Recent technological advances have led to complementary metal-oxide-semiconductor (CMOS) sensor imagers being leveraged by cameras, video systems, and the like. CMOS sensor imagers can include an integrated circuit with an array of pixel sensors, each of which can comprise a photodetector. Moreover, a CMOS sensor imager can be incorporated into a System-on-Chip (SoC). As such, the SoC can integrate various components (e.g., analog, digital, . . . ) associated with imaging into a common integrated circuit. For instance, the SoC can include a microprocessor, microcontroller, or digital signal processor (DSP) core, memory, analog interfaces (e.g., analog to digital converters, digital to analog converters), and so forth.
Visible imaging systems implemented using CMOS imaging sensors can reduce costs, power consumption, and noise while improving resolution. For instance, cameras can use CMOS imaging System-on-Chip (iSoC) sensors that efficiently marry low-noise image detection and signal processing with multiple supporting blocks that can provide timing control, clock drivers, reference voltages, analog to digital conversion, digital to analog conversion and key signal processing elements. High-performance video cameras can thereby be assembled using a single CMOS integrated circuit supported by few components including a lens and a battery, for instance. Accordingly, by leveraging iSoC sensors, camera size can be decreased and battery life can be increased. Also, dual-use cameras have emerged that can employ iSoC sensors to alternately produce high-resolution still images or high definition (HD) video.
A CMOS imaging sensor can include an array of pixel cells, where each pixel cell in the array can include a photodetector (e.g., photogate, photoconductor, photodiode, . . . ) that overlays a substrate for yielding a photo-generated charge. A readout circuit can be provided for each pixel cell and can include at least a source follower transistor. The pixel cell can also include a floating diffusion region connected to a gate of the source follower transistor. Accordingly, charge generated by the photodetector can be sent to the floating diffusion region. Further, the imaging sensor can include a transistor for transferring charge from the photodetector to the floating diffusion region and another transistor for resetting the floating diffusion region to a predetermined voltage level prior to charge transference. A floating diffusion region of a pixel cell is commonly reset by opening a circuit to a reset voltage source. Such opening of the circuit can be managed by digital control.
A typical CMOS sensor records images on a frame by frame basis; the amount of light integrated during a particular frame is linearly dependent on the duration of each frame. Additionally, the duration of each frame is inversely related to the sensor frame rate such that faster frame rates allow less light to be integrated into each pixel. Various light integration modes can be employed by a CMOS imaging sensor. For instance, in full frame integration mode, each pixel can be integrated or exposed to a light source at any times during the duration of a full frame time except when the pixel is being read and reset. This mode can allow for the maximum amount of light to be integrated in each pixel, which can provide high signal integration. Further, in sub-frame integration mode, each pixel can be integrated or exposed to a light source for a period of time which is less than a full frame time while maintaining the same frame rate as for the full frame integration mode. Conventional timing schemes controlling integration time operation within the pixel array, however, can result in non-uniformity in operation associated with these disparate integration modes. More particularly, the non-uniformity can be due to uneven timing schemes of the signals controlling the pixel array between full frame and sub-frame integration mode. For instance, when full frame integration mode is employed only one row of pixels is being reset at any given time, while two or more rows of pixels can concurrently be reset at any time when sub-frame integration mode is utilized. Resetting of two or more rows of pixels at a particular time, for instance, can create cross-talk between the two or more rows being concurrently reset. Cross-talk yielded between rows of pixels can result in undesirable image artifacts.